AR# 17501

11.1 Timing Analyzer - Cross-probing does not work consistently with FPGA Editor

説明

Cross-probing does not work consistently on my computer while using ISE. How can I make cross-probing work?

ソリューション

When a logical resource is selected in Timing Analyzer, FPGA Editor occasionally generates the following warning:  

 

"Unable to select sym LVDS_DATA/SERDES_TX/tx3/ddr_reg3/FF1." 

 

This is a known problem in correlating logical and physical elements.

AR# 17501
日付 05/20/2014
ステータス アーカイブ
種類 一般